1. Field of the Invention
The present disclosure relates generally to computer and processor architecture, input/output (I/O) processing, operating systems and in particular, to a low-latency queue pair (QP) for I/O adapters.
2. Description of the Related Art
I/O adapters, such as remote direct memory access (RDMA)-capable adapters or RDMA network interface cards (RNICs), such as the InfiniBand™ (IB) host channel adapters (HCAs), define queue pairs (QPs) for conveying messaging information from a software consumer to the adapter prior to transmission over a network fabric. Industry standards, such as the InfiniBand™ Architecture Specification available from the InfiniBand® Trade Association and iWarp from the RDMA Consortium, specify that the message information carried on QPs is in the form of a work queue element (WQE) that carries control information pertaining to the message. Also, one or more data descriptors point to the message data to be transmitted or the location at which received messages are to be placed.
Some QP applications, such as high performance computing (HPC), have a need to reduce the latency incurred in transferring a message from one computing node to another. Even now, the industry standard mechanisms described above are no longer adequate for high performance computing systems. There is a need for a mechanism to enhance the standard QP semantics so that the lower latencies required by these applications can be achieved, with minimal impact to existing hardware.